M.S./Ph.D. Student
Compiler Optimization Research Lab (CORELAB)
School of Electronical and Electronic Engineering
Yonsei University, Engineering Hall #4 C407, 50 Yonsei-Ro Seodaemun-gu, Seoul, South Korea, 03722
haeeun.jeong{at}yonsei.ac.kr
Developing the DNN domain compiler for new hardwares and systems.
Designing new compilers to improve performance, and reduce memory usage.
Developing specialized hardware accelerators for efficient DNN processing.
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